Speculative Load Hardening Lands In LLVM For Spectre V1 Mitigation
Written by Michael Larabel in LLVM on 13 July 2018 at 07:44 AM EDT. Add A Comment
The Speculative Load Hardening (SLH) effort that has been in development for months as a compiler-based automated Spectre Variant One mitigation technique has landed within LLVM trunk.

Happening in time for LLVM 7.0 is this initial Speculative Load Hardening for x86/x86_64 while ARM developers are also working on leveraging SLH within LLVM for AArch64 (64-bit ARM) as well.

While we have seen a lot of code within the Linux kernel and elsewhere manually adjusted for Spectre V1 defense, thanks to being pointed out with tools like Smatch, Speculative Load Hardening is a compiler-based approach for trying to mitigate Spectre V1.

The compiler would cause loads to be checked using branch-less code to verify its execution abides by a valid control flow path, in order to ensure its not prone to this bounds check bypass vulnerability. There is the original design document by LLVM developers who started working on SLH earlier this year.

Speculative Load Hardening is intended to be used by critical software that is unlikely to be mitigated by hand due to its complexity or unmaintained code. SLH also yields a baseline on performance if then mitigating by hand while also being a simpler approach for developers.

At this point Speculative Load Hardening in LLVM trunk is only working on x86 architectures for select ABIs. This functionality is only enabled via debug flags at the moment (the x86-speculative-load-hardening flag).
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