LLVM Gets New Scheduler Data For Sandy Bridge, Other Intel CPUs Coming
Just ahead of this week's LLVM 5.0 branching, this open-source compiler stack has received completely reworked scheduler information for Intel "Sandy Bridge" CPUs while patches are expected soon for newer generations of CPUs.
Thanks to the Intel CPU architects providing new and more accurate information about instruction latency and other precise hardware details on Sandy Bridge, LLVM developers have completely replaced the scheduler information used by the compiler's SandyBridge target. It will be very interesting to see what this rework in the scheduling information for Sandy Bridge has on the performance of generated binaries.
Beyond Sandy Bridge, patches are said to be coming to rework the scheduling information too for Ivy Bridge, Haswell, Broadwell, Skylake, and Skylake-X.
Details via this review page. It will be interesting to run some fresh benchmarks once the updated scheduler details for the newer Intel CPUs land.
Thanks to the Intel CPU architects providing new and more accurate information about instruction latency and other precise hardware details on Sandy Bridge, LLVM developers have completely replaced the scheduler information used by the compiler's SandyBridge target. It will be very interesting to see what this rework in the scheduling information for Sandy Bridge has on the performance of generated binaries.
Beyond Sandy Bridge, patches are said to be coming to rework the scheduling information too for Ivy Bridge, Haswell, Broadwell, Skylake, and Skylake-X.
Details via this review page. It will be interesting to run some fresh benchmarks once the updated scheduler details for the newer Intel CPUs land.
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