
At least one of the areas to be explored by AMD developers that could help with the AMDGPU LLVM back-end is in a new concept called Array Register Files. Longtime open-source AMD developer Nicolai Hähnle who often focuses on the LLVM compute stack has proposed this infrastructure addition to the LLVM stack that would help this back-end.
He wants to improve the LLVM infrastructure around the code generation's physical register / register class to represent regular register files more efficiently, which would help in the case of modern AMD GPUs having a ton of registers. There are also some traits about the AMD GPU registers like the ordering of registers and indirect indexing that make a difference too, unlike for many other targets.
Nicolai believes the current LLVM setup around registers isn't very efficient in their case at compile-time and also leads to a run-time performance hit if not properly modeling the properties of their register files.
More of the technical details can be found on the LLVM-dev list. The code on Array Register Files hasn't been started yet but he is currently evaluating feedback; it's good to see they are at least continuing to explore areas of optimization within their LLVM compiler back-end with this being used by the AMDVLK, RADV, and RadeonSI drivers.
From the feedback so far it also looks like Array Register Files would also help out the SimpleV parallelism work being pursued for RISC-V.
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