Intel Discloses New CPU Instructions, Enhanced Hardware Feedback Interface (EHFI)
Written by Michael Larabel in Intel on 3 October 2020 at 07:00 AM EDT. 14 Comments
INTEL --
Intel updated their programming reference manual this week with some interesting new additions, primarily around user interrupts and the enhanced hardware feedback interface.

While Intel has already disclosed AMX (Advanced Matrix Extensions) as coming with Sapphire Rapids and some other new instructions, they have now disclosed more instructions that are on the way. Some appear to be coming with Sapphire Rapids while others on the client side with Alder Lake. New Intel instructions documented by this latest PRM revision include CLUI, HRESET, SENDUIPI, STUI, TESTUI, UIRET, VPDPBUSD, VPDPBUSDS, VPDPWSSD and VPDPWSSDS.


The quick summary of these new instructions include:

CLUI - Allows clearing the user interrupt flag immediately and in turn blocking user interrupts.

HRESET - History reset to selectively reset the prediction history of the current logical processor. This reset request works for multiple predictions but what is reset is in part controlled by the operating system / kernel in what bits it sets for the HRESET MSR. Initially this allows resetting the EHFI (Enhanced Hardware Feedback Interface) history but there are reserved bits for future expansion.

SENDUIPI - This instruction allows sending user inter-processor interrupts.

STUI - Set User Interrupt Flag.

TESTUI - Copying the current value of the user interrupt flag.

UIRET - User-interrupt return to return from handling a user interrupt.

VPDPBUSD - Multiply and adding unsigned and signed bytes.

VPDPBUSDS - Multiplying and adding unsigned and signed bytes with saturation.

VPDPWSSD - Multiplying and adding signed word integers.

VPDPWSSDS - Multiplying and adding signed word integers with saturation.

A lot of the instructions revolve around user interrupts in being used for new events in the architecture at CPL 3. The new chapter outlines the architecture in great detail.

The other interesting disclosure from this update is on the Enhanced Hardware Feedback Interface (EHFI). The Enhanced Hardware Feedback Interface provides guidance to the kernel's scheduler on optimal task placement of workloads among the logical processors. EHFI aims to help the scheduler pick a CPU thread whether it is aiming for the highest performance or highest energy efficiency. It will be very interesting to see how this EHFI hardware-based scheduling works in practice and if its accurate enough to deliver significant performance/power advantages compared to the current Linux kernel scheduler. With Intel's hybrid architecture in Alder Lake the kernel's scheduler has more to deal with and hopefully EHFI will work out well for optimal placement.

The updated documentation also covers performance monitoring changes that are coming for Alder Lake and Saphpire Rapids with new capabilities of the PMU.

The latest revision of the Intel programming reference manual can be found at software.intel.com for some interesting weekend reading.
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