L3 Atomics Support Land In Intel's Mesa Driver
Written by Michael Larabel in Intel on 9 December 2015 at 08:03 AM EST. 3 Comments
INTEL --
Francisco Jerez just landed his massive set of Intel Mesa driver patches for enabling L3 atomics, the L3 partitioning state atom, and other code pertaining to L3 cache management.

L3 atomics landed for Haswell, for which Francisco explained as, "Improves performance of the arb_shader_image_load_store-atomicity piglit test by over 25x (which isn't a real benchmark it's just heavy on atomics -- the improvement in a microbenchmark I wrote a while ago seemed to be even greater). The drawback is one needs to be extra-careful not to hang the GPU (in fact the whole system)."

Along with many other commits. The DRM changes were already done recently and this work described in more detail within L3 Cache Partitioning Coming For The Intel DRM Driver.
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