Intel Gateway SoC Enablement Continues With Linux 5.6 Plus Other PCI/PCIe Changes
Written by Michael Larabel in Intel on 1 February 2020 at 07:34 AM EST. 3 Comments
INTEL --
There is plenty of PCI work that landed for the Linux 5.6 kernel merge window.

Some of the PCI/PCIe work for this cycle includes:

- A new PCIe driver for the Intel Gateway SoCs. The PCIe controller on Intel Gateway SoCs is based on a Synopsys DesignWare PCIe core. This goes along with other patches we have seen recently around "Intel Gateway SoCs" but lacking much information beyond that. Interesting in any case Intel went with Synopsys DesignWare IP as the basis for their PCI Express controller on this SoC.

- The D3 delay time for AMD Ryzen 5 / Ryzen 7 XHCI controllers is being increased to avoid an issue with some laptops where they fail to resume from run-time suspend or s2idle. In particular, this should fix the USB support on at least a few AMD Ryzen laptops.

- Intel Skylake-E is now white-listed for peer-to-peer DMA (p2pdma) support.

- Improved resource assignment for hot-added nested bridges, which is primarily being done around modern Thunderbolt devices.

- Bcrmstb is a new Broadcom STB PCI Express controller driver used by some settop boxes.

- Switchtec has added support for Gen4 devices to their driver.

- Qualcomm SDM845 PCI Express controller support.

The full list of Linux 5.6 PCI changes via the PR.
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Michael Larabel is the principal author of Phoronix.com and founded the site in 2004 with a focus on enriching the Linux hardware experience. Michael has written more than 20,000 articles covering the state of Linux hardware support, Linux performance, graphics drivers, and other topics. Michael is also the lead developer of the Phoronix Test Suite, Phoromatic, and OpenBenchmarking.org automated benchmarking software. He can be followed via Twitter or contacted via MichaelLarabel.com.

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