GNU Toolchain Begins Landing RISC-V Bitmanip/Zbs Instructions Support
Written by Michael Larabel in RISC-V on 7 October 2021 at 05:19 AM EDT. 5 Comments
RISC-V --
The GNU toolchain (initially with the GNU Assembler) has begun landing support for RISC-V's Zbs instructions that are part of the Bitmanip extension to the processor ISA.

Zbs is part of RISC-V's Bitmanip extension, the "bit manipulation" additions to the RISC-V architecture focused on delivering code size reduction, better performance, and lower energy consumption. The 1.0 Bitmanip extension was frozen this summer and thus now moving on to compiler/toolchain support. More details on Bitmanip and the specific Zbs instructions via this repository.

There were several commits made this morning to GNU Binutils Git for adding the support for the RISC-V Zbs instructions. These RISC-V additions will in turn be with GNU Binutils 2.38 and presumably the GCC compiler support for the new instructions also settle in time for next year's GCC 12.

In somewhat related news, Linux 5.16 is adding KVM support for RISC-V now that RISC-V's hypervisor extension has also entered a frozen state.
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