GCC 9 Lands Initial Support For The OpenRISC Architecture
Written by Michael Larabel in GNU on 10 November 2018 at 06:23 AM EST. Add A Comment
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It's been a long journey for the OpenRISC CPU instruction set architecture not to be confused with RISC-V, but with the GCC 9.1 compiler release due out in early 2019 will finally be initial mainline support for this ISA.

There had been GCC OpenRISC patches for a while, but the original developers were not okay with assigning their copyrights to the Free Software Foundation as is required to contribute to the GCC project (and most other FSF projects for that matter). Since earlier this year a clean-room rewrite of the GCC OpenRISC port has been taking place and the GCC steering committee approved of this CPU architecture seeing a port in GCC.

After recently sending out the latest patches, that OpenRISC port was merged on Friday to mainline GCC. This is just in time with GCC 9 feature development ending in the next week or so.

The code is on master and ready for any simulators or OpenRISC hardware. This initial support is catered to the OpenRISC 1000 (or1k) series. This compiler toolchain support complements the Linux kernel's support for OpenRISC or1k that has been in place since the early Linux 3.x days.
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Michael Larabel is the principal author of Phoronix.com and founded the site in 2004 with a focus on enriching the Linux hardware experience. Michael has written more than 10,000 articles covering the state of Linux hardware support, Linux performance, graphics drivers, and other topics. Michael is also the lead developer of the Phoronix Test Suite, Phoromatic, and OpenBenchmarking.org automated benchmarking software. He can be followed via Twitter or contacted via MichaelLarabel.com.

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