GCC 10 Lands Support For Emulating MMX With SSE Instructions
Written by Michael Larabel in GNU on 17 May 2019 at 08:09 AM EDT. 22 Comments
GNU --
The GCC 10 code compiler merged support to begin emulating MMX intrinsics using SSE.

Back in February we wrote about the patches by Intel for implementing MMX intrinsics using SSE instructions. For those still relying upon MMX SIMD instructions, the benefit of implementing it using SSE is that it frees up an 8-byte vectorizer for SSE2 when MMX is disabled. Presumably, future Intel CPUs might end up retiring MMX at long last.

Now that GCC 9 has been released and GCC 10 in the early stages of development, prolific Intel toolchain developer H.J. Lu merged all of the MMX emulation code into the compiler for next year's GCC 10.1 release.

MMX has been around since 1997 with the P5 Pentium processors while has long been superseded by SSE and AVX for modern SIMD.
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Michael Larabel is the principal author of Phoronix.com and founded the site in 2004 with a focus on enriching the Linux hardware experience. Michael has written more than 10,000 articles covering the state of Linux hardware support, Linux performance, graphics drivers, and other topics. Michael is also the lead developer of the Phoronix Test Suite, Phoromatic, and OpenBenchmarking.org automated benchmarking software. He can be followed via Twitter or contacted via MichaelLarabel.com.

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