Resizable BAR Support Being Prepared For Coreboot
Written by Michael Larabel in Coreboot on 17 February 2022 at 02:43 PM EST. 15 Comments
COREBOOT --
Thanks to Google engineers there is Resizable BAR "ReBAR" support being worked on for the open-source Coreboot.

The new code merged yesterday for Coreboot adds the necessary changes to be in compliant with the PCI Express specification around Resizable BAR for being able to determine the BAR size from the given device. Resizable BAR allows for more efficient access to the video memory by the CPU rather than being limited to small BAR sizes (256MB), now for many graphics cards the entire vRAM is mapped and accessible. Newer desktop motherboards with supported chipsets have been quick to advertise ReBAR (or also known as AMD Smart Access Memory) while finally ReBAR support is being added to Coreboot.

The Coreboot support can be enabled via the PCIEXP_SUPPORT_RESIZABLE_BARS Kconfig switch. While the core device code has been added to Coreboot, as of writing there isn't yet any mainline Coreboot motherboard ports able to make use of ReBAR besides a follow-up commit for Google's "Agah" board board having "a peripheral that will require the use of the PCI Resizable BAR feature."


The Resizable BAR support for Coreboot was added as part of this commit. Of course, this is just part of the puzzle with the actual motherboard and chipset needing to support this PCIe feature as well as the particular PCI Express device itself.
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Michael Larabel is the principal author of Phoronix.com and founded the site in 2004 with a focus on enriching the Linux hardware experience. Michael has written more than 20,000 articles covering the state of Linux hardware support, Linux performance, graphics drivers, and other topics. Michael is also the lead developer of the Phoronix Test Suite, Phoromatic, and OpenBenchmarking.org automated benchmarking software. He can be followed via Twitter, LinkedIn, or contacted via MichaelLarabel.com.

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