Intel Continues Prepping Initial Bits For Compute Express Link Device Support (CXL)
Written by Michael Larabel in Intel on 20 May 2020 at 02:43 PM EDT. 3 Comments
INTEL --
Compute Express Link is the interconnect standard backed by Intel, AMD, Google, Facebook, Microsoft, Dell, and others for building off PCI Express with new CPU-to-device and CPU-to-memory capabilities. Intel's stellar open-source team has been working on plumbing the Linux kernel support for this next generation of devices.

Recently the Intel open-source Linux developers have begun working on the Compute Express Link support by beginning with the DVSEC (Designated Vendor-Specific Extended Capabilities) handling for CXL devices. This code is needed for identifying CXL-capable devices off the PCI Express bus and lays the basis for their initial CXL bring-up on Linux and the introduction of drivers/pci/cxl.c and related wiring into the kernel's PCI subsystem code.

This also adds PCI_CXL as the new Kconfig switch for enabling Compute eXpress Link support, albeit not yet wired up in full. Sent out today were the latest CXL DVSEC patches. Separately is another patch series adding CXL information to the lspci reporting.

It's possible these initial CXL kernel patches could be queued as part of the PCI-next code in time for the upcoming Linux 5.8 cycle otherwise would be waiting until at least Linux 5.9 later in 2020 for landing. The timing should work out fine, however, as we are unlikely to see CXL devices for a while.
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