Cannonlake/Icelake Desktop CPUs Won't Have PKU Memory Protection Support
Written by Michael Larabel in Intel on 28 December 2017 at 06:02 AM EST. 1 Comment
Support for Memory Protection Keys (a.k.a. PKU / PKEYs) was finished up this year in the Linux kernel, glibc, and related components. This memory protection feature premiered with Intel Xeon Scalable CPUs and is said to be coming to future desktop CPUs, but it doesn't look like that's happening for the Cannonlake or Icelake generations.

Memory Protection Keys is a means of enforcing page-based protections by making use of some previously ignored bits in each page table entry, previously outlined and also documented in greater technical detail via the kernel documentation.

While PKU will presumably be kept with all Intel Xeon server CPUs moving forward, it looks like it will be a ways out before seeing it on the desktop side. This Clang commit implies PKU won't be supported on the desktop Cannonlake and Icelake processors, the next two Intel CPU microarchitectures succeeding Kabylake/Coffeelake.

That patch also mentions CLWB isn't supported on Cannonlake but will be on Icelake. CLWB is a new instruction for non-volatile memory programming. Icelake is also bringing with it other new AVX-512 instructions.

Cannonlake CPUs will be making their debut in 2018 while Icelake after that. Interesting from the instruction front with Cannonlake is the desktop CPUs getting AVX-512 support, at least judging by the compiler activity to both GCC and LLVM/Clang. It will be interesting to see how Cannonlake shapes up in the months ahead.
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