Arm SVE2 Support Aligning For GCC 10, LLVM Clang 9.0
Written by Michael Larabel in Arm on 24 May 2019 at 07:09 AM EDT. 5 Comments
ARM --
Given the significant performance benefits to Arm's Scalable Vector Extension 2 (SVE2), they are working on ensuring the open-source Linux compiler toolchains support these new CPU instructions ahead of SoCs shipping that support this big addition.

Arm announced Scalable Vector Extension 2 (SVE2) recently as their latest advancement around SIMD programming and increasing data-level parallelism in programs. SVE2 is designed to ultimately deliver better SIMD performance than their long-available Neon extensions and to scale the performance with vector length increases as well as enabling auto-vectorization techniques. More details in this post on SVE2.

Similar to the Transactional Memory Extensions being plumbed into the compilers (TME was announced at the same time as SVE2), Arm is also working on bringing up the SVE2 support within the prominent open-source compilers to ensure their availability for developers working on next-generation Arm hardware support.

As of this week, the GCC 10 development code now has the SVE2 flags to enable the core SVE2 instructions. That GCC code also enables support for the original SVE extension that was targeted just for Arm HPC purposes.

At the same time, LLVM/Clang is seeing many commits around SVE2 enablement.

It's good to see this code landing promptly. The SVE2 support in LLVM/Clang is there for version 9.0 that should be out this ~September while the GNU Compiler Collection support will be in GCC10 that isn't due to be released until its usual timing around the end of Q1 / early Q2 of next year. At this point there doesn't appear to be any public communication yet about when the first SVE2-enabled cores/SoCs will be released.
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