AMDGPU Driver Gets Patches Enabling Two More Interrupt Rings On Vega 10
Written by Michael Larabel in Radeon on 26 September 2018 at 03:29 PM EDT. 13 Comments
RADEON --
While AMD's open-source Linux driver developers have been busy on bringing up Vega 20 support as well as Picasso APUs, they aren't done yet optimizing their Vega 10 support.

Published today were a set of 12 patches that enable two more IH rings for interrupt handling with the Vega 10 hardware. Up to now there's just been the main interrupt ring programmed by the AMDGPU driver and these two other rings left uninitialized.


The patches don't provide much context for these two extra interrupt rings now being enabled for Vega 10. When inquiring about these 12 new patches, in the long-term they may provide some performance benefits as future patches could provide smarter logic around buffer placement, etc.

It is also worth noting that these two IH rings on Vega 10 and newer are also used by the HBCC (High Bandwidth Cache Controller) support with the AMD Windows driver.

We'll see if this enablement of the additional IH rings lands in time for the upcoming 4.20~5.0 cycle or is delayed another cycle, but there isn't much immediate rush anyhow without further yet-to-be-written patches building upon the support.
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Michael Larabel is the principal author of Phoronix.com and founded the site in 2004 with a focus on enriching the Linux hardware experience. Michael has written more than 10,000 articles covering the state of Linux hardware support, Linux performance, graphics drivers, and other topics. Michael is also the lead developer of the Phoronix Test Suite, Phoromatic, and OpenBenchmarking.org automated benchmarking software. He can be followed via Twitter or contacted via MichaelLarabel.com.

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