Intel Posts Big Set of Patches For AVX-512 FP16 Compiler Support For Sapphire Rapids
Written by Michael Larabel in Intel on 1 July 2021 at 07:08 AM EDT. 8 Comments
Besides Sapphire Rapids introducing Advanced Matrix Extensions (AMX), new developer documentation has detailed AVX-512 FP16 capabilities coming with the next-generation Xeon processors. Intel has posted initial developer documentation around AVX512FP16 as well as a big set of GCC and LLVM Clang compiler patches for handling the new intrinsics.

The new documentation confirms the AVX-512 FP16 data type support coming with Sapphire Rapids. Compared to FP32/FP64, the FP16 support for AVX-512 supports full speed handling of denormal (FP16) values. This also isn't to be confused with the AVX-512 BF16 support found with Cooper Lake for BFloat16. This AVX-512 half-precision floating point support should help for training and inference with deep learning models where FP32 isn't needed, among other use-cases.

Intel hasn't talked much about the AVX-512 FP16 capabilities for Sapphire Rapids but the initial documentation can be found at and was just recently made public.

Intel compiler engineers have now posted a set of 62 patches for the GNU Compiler Collection (GCC) to support all of the new AVX512FP16 intrinsics along with _Float16 auto-vectorization and related work.

So far the GCC code-base hasn't seen any AVX-512 FP16 support but given the current timing this work still should comfortably land for the GCC 12 compiler due out next year. GCC 12 stable should be out in Q2 next year, right around the time of the Xeon Sapphire Rapids ramp expectations. So it will be in a stable compiler but with not already having it in say GCC 11 will mean that distributions like Ubuntu 22.04 LTS do not have this support as part of their default compiler. Normally Intel is quite good at getting new compiler features mainlined well enough in advance that the support is normally squared away a year at least ahead of launch to ensure widespread support. With Sapphire Rapids there have been some bits coming a bit late like the AMX enablement still coming together and now also this AVX-512 FP16 work.

Intel engineers also posted a set of LLVM/Clang patches on Wednesday for wiring up the AVX512-FP16 support. On the Clang front if it lands soon it will get into LLVM 13.0 that thanks to its half-year release cadence will appear in stable versions this autumn.

While the documentation from Intel confirms this AVX-512 FP16 support for Sapphire Rapids, for those wanting to detect the capability moving forward a prior Linux kernel patch added the CPU ID detection and in turn reporting it as "avx512_fp16" via /proc/cpuinfo.
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