AMD EPYC 7002 Series Unveiled With Primed Linux Support & Strong Server Performance
Written by Michael Larabel in Processors on 7 August 2019. Page 1 of 2. 12 Comments

One month ago today we were talking about the AMD Ryzen 3000 series processor and new Radeon RX 5700 series graphics cards, all manufactured on TSMC's 7nm process. Today, for 7th August, the embargo has now lifted and we are talking about something arguably more exciting, or at least the ability to more profoundly impact an industry (data centers): AMD's EPYC 7002 series is ready and their line-up and ultimately the resulting performance is the most exciting and competitive we have seen ever out of AMD in the server space.

For the better part of the past month we have been testing some of AMD's EPYC 7002 "Rome" series processors on Linux and the performance has wound up being a huge improvement over the initial AMD EPYC 7000 "Naples" processors and are able to take on Intel's Xeon Scalable Cascade Lake processors not only in price but also raw performance and power efficiency. AMD's Zen 2 microarchitecture has been a significant step forward that's only been compounded by Intel's missteps around 10nm manufacturing and the performance costs incurred by the various speculative execution vulnerabilities (Spectre / Meltdown / Zombieload / Foreshadow, and now also SWAPGS). In this article is an overview of the EPYC 7002 series and some high-level findings and comments while in our other launch-day articles are a look at the favorite area: Linux performance (if you just care about those numbers, jump to the benchmark results article).

AMD's EPYC 7002 line-up is built off the Zen 2 microarchitecture that was introduced last month with the Ryzen 3000 series processors. So by now you are likely to know about the 7nm manufacturing, PCI Express 4.0 support, significant IPC uplift over Zen/Zen+, initial hardware mitigations against Spectre, better AVX2 performance, and many other architectural improvements. With the EPYC Rome processors there are up to eight multiple CPU dies per socket paired with a 14nm I/O die yielding up to 64 cores (and 128 threads) per socket. Yes, that's while Intel's Xeon Cooper Lake will only offer up to 56 cores per socket -- next year -- and ignoring the Xeon Scalable 9200 AP series that aren't readily available and not to mention the price or thermal on that front.

The EPYC 7002 line-up ranges on the low-end from the EPYC 7232P as an eight core / sixteen thread part with 3.1GHz base frequency and 3.2GHz boost frequency up through the flagship EPYC 7742. The EPYC 7742 is a 64 core / 128 thread part with 2.25GHz base frequency and 3.4GHz boost frequency with 256MB of L3 cache. All of these EPYC 7002 series processors feature eight memory channels and now natively support DDR4-3200 compared to DDR4-2667 on the original EPYC processors. These 19 processors is more than the original EPYC line-up but still straight forward and no-nonsense compared to Intel's nearly sixty different Xeon Scalable models for Cascadelake.

What about pricing? The one thousand unit pricing on the flagship EPYC 7742 is set to go for $6,950 USD while for the 1P focused parts the EPYC 7702P will top out at $4,425 USD. At the lowest end of the spectrum, the EPYC 7252 is launching for $475 or $450 on the EPYC 7232P. In comparison, Intel's flagship non-AP Cascadelake part is the Xeon Platinum 8280 and that 28-core / 56-thread processor retails for around $10k USD. See our performance-per-dollar metrics in the benchmark articles.

Like the Ryzen 3000 series, EPYC 7002 delivers much better IPC performance thanks to Zen 2's better branch prediction, doubled floating point capabilities, lower effective memory latency, and other improvements.

At the AMD EPYC 7002 Reviewer's Day in Austin, AMD was also keen on talking about the security of their processors and the new hardware mitigations with Zen 2 against Spectre. One tid-bit of additional information to mention is that with the latest EPYC 7002 microcode, their default behavior that carries through to Linux is using conditional RSB (Return Stack Buffer) filling rather than "always-on" that is currently the case with Ryzen 3000 series processors and their current microcode. Intel uses the conditional RSB filling as well as part of their Spectre Variant Two mitigations while "always-on" of course carries some additional performance cost. So EPYC 7002 is sensibly using the conditional behavior and I have heard they may be changing Ryzen 3000's always-on RSB filling to conditional as well, but as of writing haven't seen any BIOS updates or official announcement. But should that indeed happen, that will allow the Ryzen 3000 performance to slightly improve: see more details on the Zen 2 Spectre mitigation benchmarks from back in July on those consumer parts. I'll do some fresh mitigation server benchmarks soon especially with some additional Intel Xeon tests now that SWAPGS went public yesterday but too late to do any of those Intel mitigated runs for today's benchmarking.



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