The Big Features Of Linux 5.1: IO_Uring, Intel Fastboot Default, Goya AI Accelerator, New Hardware
The two-week long merge window for Linux 5.1 is expected to close later today so here is a look back at all of the changes and new features coming with this next version of the Linux kernel.
Among the changes and new features that were on my radar during the Linux 5.1 kernel merge window included:
- Intel Fastboot is finally enabled by default after developers toyed with the idea for years. This Intel graphics driver feature for eliminating unnecessary mode-set operations at boot-time has been an option going back the better part of a decade while with Linux 5.1 is enabled by default for Skylake and newer hardware as well as recent Atoms. Those on older Intel graphics can still toggle the feature with the i915.fastboot=1 kernel parameter. Fastboot helps provide a clean, flicker-free Linux boot experience.
- Coffeelake GVT support is finally here for Intel's graphics virtualization tech.
- The Nouveau DRM driver has Heterogeneous Memory Management hook-ups to provide Shared Virtual Memory support.
- AMDGPU Vega 10/20 BACO support and other Vega enhancements. AMDGPU also has DCC scan-out support that jives with the latest user-space patches for Raven Ridge hardware.
- A new DRM driver this cycle is the Arm Komeda display driver.
- Support for the Bitmain SoC as a dual-core A53 combined with a single RISC-V core, though only the Arm processor is supported at this time. There is also other new Arm support including the Socionext Milbeaut, NXP i.MX8QuadXPlus, and a few Rensas SoCs.
- Reducing the scope of Spectre V4 speculation protection with the new PR_SPEC_DISABLE_NOEXEC bit.
- On the Spectre V2 front are some minor optimizations.
- On the accelerator side, there is the Habana Labs Goya accelerator now supported with its new driver. Ultimately there is expected to be a new "accelerator" subsystem in the Linux kernel but for now it's living in the char/misc space. It's great to see this AI accelerator having open-source, mainline kernel support.
- Icelake PMC core support was added for dealing with the power management controller registers on these long-awaited CPUs.
- Pinning sensitive CR0/CR4 bits are now done around Intel SMAP/UMIP/SMEP to better fend off a recent wave of exploits.
- Given the increasing core counts with ARM SoCs, the 64-bit ARM default configuration for the kernel will now default to 256 max CPUs. Granted, the number can be easily decreased or increased, this is just about the "defconfig" kernel.
- RISC-V hardware support is maturing where moving forward kernel patches are expected to be tested and run on at least SiFive's HiFive Unleashed developer board.
- The new TEO CPU idle governor for tickless systems was merged.