Intel Launches 4th Gen Xeon Scalable "Sapphire Rapids", Xeon CPU Max Series
Similar to AMD 4th Gen EPYC processors, Sapphire Rapids supports DDR5 system memory, PCIe 5.0 connectivity, and CXL 1.1. Though to Genoa's benefit there is 12 channel DDR5-4800 support compared to Sapphire Rapids handling 8 memory channels at DDR5-4800 or lower memory speeds with the lower SKUs and Genoa features 128 lanes of PCIe 5.0 compared to 80 lanes with Sapphire Rapids.
The new accelerator engines with DSA, IAA, DLB, and QAT being on-chip is how they are aiming to better compete/outperform the AMD EPYC competition. Though the accelerator engines do depend upon proper software support and as mentioned the accelerator engines aren't universally available to 4th Gen Xeon Scalable but depends upon the SKU and additionally the Intel On Demand upgrade model. More details on the software support later in the article.
The AMX support is very exciting as part of the new acceleration offerings with Sapphire Rapids. Fortunately, Intel has been working on the Linux kernel and compiler toolchain support around the AMX ISA for a while. With modern Linux environments the AMX support should be in good shape for helping speed-up AI inference/training.
It was rather interesting during Intel's press/analyst briefing that they were taking shots at SPEC benchmarks with Sapphire Rapids. They argue that customer workloads have varied greatly from what SPEC CPU benchmarks tend to represent. Hey, I agree with them... That's why for over a decade I have been pushing for real-world workload focus for benchmarking and also testing across dozens or in some cases hundreds of different workloads. Customer needs continue to be more diverse and not represented well by just one, two, or even a handful of benchmarks. (OF course, the SPEC benchmarks aren't benefiting from the new accelerator IP with SPR...)
For workloads and software able to take advantage of the Sapphire Rapids IP, Intel is promoting big gains with 4th Gen Xeon Scalable. Intel has been getting all of the necessary Linux kernel bits (such as the IDXD kernel driver for the Data Streaming Accelerators) into shape, the new ISA coverage in the compilers, and more. That foundation has been laid for the Sapphire Rapids launch with modern Linux stacks. But there is also Intel software components needed in user-space and then as well the various relevant applications / software upstreams to make use of these new features. That's where in many cases it will take longer before Intel's accelerator strategy can really pay off and be robust.
Unofficial commentary from various Intel engineers has been that it will likely be at least a quarter or two before seeing more open-source software upstreams beginning to see integration of code for supporting the new accelerators. Of course, for more widespread support into more niche projects depends upon more developers getting their hands on Sapphire Rapids either physically or availability via public clouds.