LLVM Lands Support For The Marvell ThunderX3

Written by Michael Larabel in LLVM on 14 May 2020 at 06:35 AM EDT. 3 Comments
Announced back in March were the Marvell ThunderX3 Arm server processors with up to 96 cores per SoC and support for 4-way SMT to yield up to 384 threads per socket. These 7nm Arm server processors also support eight channels of DDR4-3200 memory, 64 lanes of PCIe 4.0, and other competitive features for a 2020 server CPU. While we await to see how the ThunderX3 processors perform, the compiler support and other Linux software features are getting all buttoned up.

In April I wrote about the ThunderX3 support for the GCC compiler getting squared away while this month the LLVM compiler support is ready.

Being merged on Wednesday was the initial ThunderX3 (ThunderX3T110) support.

With LLVM Git or what will become LLVM 11.0, the -mcpu=thunderx3t110 option is supported for those wanting to target this new Marvell/Cavium server CPU. This flag enables ARMv8.3-A plus enabling all of the relevant extra instructions supported by this processor as well as being aware of the ThunderX3 attributes.
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Michael Larabel is the principal author of Phoronix.com and founded the site in 2004 with a focus on enriching the Linux hardware experience. Michael has written more than 20,000 articles covering the state of Linux hardware support, Linux performance, graphics drivers, and other topics. Michael is also the lead developer of the Phoronix Test Suite, Phoromatic, and OpenBenchmarking.org automated benchmarking software. He can be followed via Twitter, LinkedIn, or contacted via MichaelLarabel.com.

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