RISC-V Summit 2021 - High Performance Processors, Other Interesting Talks

Written by Michael Larabel in Linux Events on 9 December 2021 at 05:35 AM EST. 93 Comments
Taking place in San Francisco from Monday through yesterday evening was the RISC-V Summit for discussions around this dominant open-source processor ISA. For those that did not make it to the event, many of the slide decks are available.

The 2021 RISC-V Summit covered the XiangShan as an open-source high performance RISC-V processor out of China, various RISC-V demonstrations, various IoT / edge computing talks in the context of using RISC-V, various Linux kernel features for this ISA, different RISC-V extensions, the various wares of leading RISC-V designer SiFive, and much more.

The XiangShan open-source RISC-V high performance processor talk is probably what I found most interesting with this year's RISC-V Summit. But whether it will deliver on all its goals and see any western availability may be a different story.

From the schedule area is a full listing of tracks and when going to a particular session are the slide decks where currently available.
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Michael Larabel is the principal author of Phoronix.com and founded the site in 2004 with a focus on enriching the Linux hardware experience. Michael has written more than 20,000 articles covering the state of Linux hardware support, Linux performance, graphics drivers, and other topics. Michael is also the lead developer of the Phoronix Test Suite, Phoromatic, and OpenBenchmarking.org automated benchmarking software. He can be followed via Twitter, LinkedIn, or contacted via MichaelLarabel.com.

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