QEMU 7.0 Released With Intel AMX Support, Many RISC-V Additions
QEMU 7.0 is out today as the newest version of this important piece of the open-source Linux virtualization stack.
Since QEMU 6.2 at the end of last year, developers at Red Hat and other organizations have been busy working on QEMU 7.0 as this open-source emulator widely used as part of the free software Linux virtualization stack. QEMU 7.0 brings support for Intel AMX, a lot of ongoing RISC-V work, and more. Some of the QEMU 7.0 highlights include:
- QEMU continues maturing for the RISC-V CPU architecture support. QEMU 7.0 supports RISC-V's 1.0 Vector extension in ratified form, the RISC-V KVM support that was recently mainlined, experimental support for 128-bit CPUs, and support for a variety of other recent RISC-V extensions. The RISC-V virt machine now also supports up to 32 cores.
- QEMU 7.0 on x86 adds support for Intel Advanced Matrix Extensions (AMX). Intel AMX is one of the big additions coming with Xeon Scalable "Sapphire Rapids" processors shipping later this year and open-source Intel engineers have been busy plumbing AMX support throughout the Linux stack.
- Initial bits of SR/IOV support has landed for QEMU's PCI/PCIe code.
- There is a new "-display dbus" option for exporting QEMU's display for external processes. This Dbus display option is intended for the gtk4-rs widget in development for future GNOME Boxes, Virt-Viewer, and other software.
- Fleecing backup is now considered to be more flexible.
- QEMU 7.0 for OpenRISC now supports up to four cores where as previously was limited to two cores.
- QEMU 7.0 drops support for old PowerPC 401 / 403 / 601 / 602 CPUs.
- Dropping of Armv4 and Armv5 from the Tiny Code Generator (TCG).
- QEMU on the Arm architecture side has various improvements to its virt board, a new Mori BMC board model, support for emulating LVA / LPA / LPA2 features, and Xilinx Versal-virt emulation improvements.
Downloads and more details on the QEMU 7.0 release via QEMU.org.
Since QEMU 6.2 at the end of last year, developers at Red Hat and other organizations have been busy working on QEMU 7.0 as this open-source emulator widely used as part of the free software Linux virtualization stack. QEMU 7.0 brings support for Intel AMX, a lot of ongoing RISC-V work, and more. Some of the QEMU 7.0 highlights include:
- QEMU continues maturing for the RISC-V CPU architecture support. QEMU 7.0 supports RISC-V's 1.0 Vector extension in ratified form, the RISC-V KVM support that was recently mainlined, experimental support for 128-bit CPUs, and support for a variety of other recent RISC-V extensions. The RISC-V virt machine now also supports up to 32 cores.
- QEMU 7.0 on x86 adds support for Intel Advanced Matrix Extensions (AMX). Intel AMX is one of the big additions coming with Xeon Scalable "Sapphire Rapids" processors shipping later this year and open-source Intel engineers have been busy plumbing AMX support throughout the Linux stack.
- Initial bits of SR/IOV support has landed for QEMU's PCI/PCIe code.
- There is a new "-display dbus" option for exporting QEMU's display for external processes. This Dbus display option is intended for the gtk4-rs widget in development for future GNOME Boxes, Virt-Viewer, and other software.
- Fleecing backup is now considered to be more flexible.
- QEMU 7.0 for OpenRISC now supports up to four cores where as previously was limited to two cores.
- QEMU 7.0 drops support for old PowerPC 401 / 403 / 601 / 602 CPUs.
- Dropping of Armv4 and Armv5 from the Tiny Code Generator (TCG).
- QEMU on the Arm architecture side has various improvements to its virt board, a new Mori BMC board model, support for emulating LVA / LPA / LPA2 features, and Xilinx Versal-virt emulation improvements.
Downloads and more details on the QEMU 7.0 release via QEMU.org.
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