OpenRISC Continues Puttering Along With Linux 4.19 Improvements, New GCC Port
While OpenRISC has been around longer than RISC-V as an open-source processor ISA, with not having as many commercial stakeholders involved, it hasn't been off to the races as quickly, but it's still marching to the beat of its own drum.
OpenRISC developer Stafford Horne today sent in the kernel patches for the Linux 4.19 cycle. The only changes on the OpenRISC front for the Linux 4.19 cycle is work done by Christoph Hellwig to allow this CPU architecture code to use the kernel's generic DMA interfaces.
Hours later, Stafford sent out a new GCC port. While there's been an existing OpenRISC port of the GNU Compiler Collection (GCC), some of the original developers didn't consent to the Free Software Foundation copyright assignment. As a result, Stafford Horne has spent the past several months working on a clean room rewrite of the GCC OpenRISC code given his willingness to get it mainlined and is okay with the FSF copyright transfer.
This new GCC port developed by Horne and Richard Henderson is about 150 thousand lines of code. Those interested can see the code on GitHub.
So OpenRISC is still certainly moving along, just not as fast as RISC-V that has backing from the likes of NVIDIA and Western Digital while also having the SiFive Unleashed SoC developer platform. If you are wondering why RISC-V didn't use OpenRISC at the time, it came down to shortcomings with the ISA at the time that were previously discussed.
OpenRISC developer Stafford Horne today sent in the kernel patches for the Linux 4.19 cycle. The only changes on the OpenRISC front for the Linux 4.19 cycle is work done by Christoph Hellwig to allow this CPU architecture code to use the kernel's generic DMA interfaces.
Hours later, Stafford sent out a new GCC port. While there's been an existing OpenRISC port of the GNU Compiler Collection (GCC), some of the original developers didn't consent to the Free Software Foundation copyright assignment. As a result, Stafford Horne has spent the past several months working on a clean room rewrite of the GCC OpenRISC code given his willingness to get it mainlined and is okay with the FSF copyright transfer.
This new GCC port developed by Horne and Richard Henderson is about 150 thousand lines of code. Those interested can see the code on GitHub.
So OpenRISC is still certainly moving along, just not as fast as RISC-V that has backing from the likes of NVIDIA and Western Digital while also having the SiFive Unleashed SoC developer platform. If you are wondering why RISC-V didn't use OpenRISC at the time, it came down to shortcomings with the ISA at the time that were previously discussed.
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