The Linux Kernel Is Preparing To Enable 5-Level Paging By Default

Written by Michael Larabel in Intel on 14 September 2019 at 10:47 AM EDT. 44 Comments
While Intel CPUs aren't shipping with 5-level paging support, they are expected to be soon and distribution kernels are preparing to enable the kernel's functionality for this feature to extend the addressable memory supported. With that, the mainline kernel is also looking at flipping on 5-level paging by default for its default kernel configuration.

Intel's Linux developers have been working for several years on the 5-level paging support for increasing the virtual/physical address space for supporting large servers with vast amounts of RAM. The 5-level paging increases the virtual address space from 256 TiB to 128 PiB and the physical address space from 64 TiB to 4 PiB. Intel's 5-level paging works by extending the size of virtual addresses to 57 bits from 48 bits.

The 5-level paging support for the Linux kernel has been largely settled on recent kernel versions in preparation for Intel hardware supporting this functionality. The CONFIG_X86_5LEVEL option though hasn't been enabled by default but now it's likely to be in an upcoming kernel release.

Per this patch enabling 5-level paging by default, that should soon land. But there are concerns remaining over a performance impact of the 5-level code on 4-level hardware and possible implications of 5-level paging on 5-level hardware when that extended physical/virtual address space isn't needed.

The Intel developers believe that the performance regressions previously discovered with this code have been addressed, so it's likely to be flipped on soon, we'll see at that point if any other performance issues come up.
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