Libre-SoC Pursuing New Crypto Primitives & Instructions For OpenPOWER

While Libre-SoC began as "Libre RISC-V" envisioned as a low-power graphics/Vulkan accelerator, it has morphed into a hybrid CPU/GPU design built on OpenPOWER and in very early form seeing test fabrication on a TSMC 180nm process. The latest funding received is now working on adding cryptographic improvements to it and/or the upstream OpenPOWER ISA.

Libre-SoC received another $50k EUR grant from the NLnet Foundation to research and develop possible cryptographic primitives and instructions for the open-source POWER ISA. The focus of this research grant is going to be on "taking apart key strategic cryptographic algorithms back to their mathematical roots, then applying Vector ISA design analysis and seeing what can be created. examples include going back to the fundamental basis of Rijndael, and instead of creating hardcoded custom silicon for MixColumns as is the "normal" practice, adding a generic Galois Field ALU and a generic Matrix Multiply system. another is to design instructions suitable for "big integer math"."

The hope is ultimately this crypto research on OpenPOWER might be useful for future algorithms to better secure digital wallets, blockchain management, and other use-cases. But don't expect Libre-SoC to be a high performance miner or other crypto accelerator given its current design and obstacles involved.

More details on the Libre-SoC crypto research grant via libre-soc-dev.