Intel Has A Huge Batch Of New Graphics Driver Code For Linux 5.15
Intel engineers on Friday submitted a big batch of kernel graphics driver improvements to DRM-Next for queuing ahead of the Linux 5.15 merge window.
This latest Intel Linux graphics pull request has DG2 graphics card enabling, initial work on XeHP, DRM scheduler preparations, getting TTM memory management now ready for discrete GPU systems, and other bleeding edge hardware work.
- Initial code for XeHP and DG2 discrete graphics. Intel began posting this XeHP SDV and DG2 graphics card code last month following DG1 getting squared away.
- A major refactoring of the GuC (Graphics micro-controller) back-end to allow for enabling on Gen11+. Intel has been reading GuC firmware based power management for newer hardware. Well, it's long been ongoing but with the recent push seems that at least for the latest hardware might finally be ready for the limelight.
- Support for using TTM memory management for system memory on discrete graphics platform systems.
- Preparations around using the DRM scheduler.
- Pipelined page migration and clearing.
- Workarounds necessary for Alder Lake P as well as fixes specific to Alder Lake S.
- With Gen12 graphics making use of fuse information now for figuring out when to enable the Scaler and Format Converter (SFC) unit.
The full list of notable changes for this latest Intel pull request can be found via dri-devel.
This latest Intel Linux graphics pull request has DG2 graphics card enabling, initial work on XeHP, DRM scheduler preparations, getting TTM memory management now ready for discrete GPU systems, and other bleeding edge hardware work.
- Initial code for XeHP and DG2 discrete graphics. Intel began posting this XeHP SDV and DG2 graphics card code last month following DG1 getting squared away.
- A major refactoring of the GuC (Graphics micro-controller) back-end to allow for enabling on Gen11+. Intel has been reading GuC firmware based power management for newer hardware. Well, it's long been ongoing but with the recent push seems that at least for the latest hardware might finally be ready for the limelight.
- Support for using TTM memory management for system memory on discrete graphics platform systems.
- Preparations around using the DRM scheduler.
- Pipelined page migration and clearing.
- Workarounds necessary for Alder Lake P as well as fixes specific to Alder Lake S.
- With Gen12 graphics making use of fuse information now for figuring out when to enable the Scaler and Format Converter (SFC) unit.
The full list of notable changes for this latest Intel pull request can be found via dri-devel.
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