Intel AMX Support Begins Landing In LLVM
Following Intel publishing the initial Advanced Matrix Extensions (AMX) documentation at the end of June, the open-source/Linux bring-up has continued for these new CPU instruction set extensions set to premiere with Sapphire Rapids next year.
Last week I outlined Intel beginning to send out Linux patches around AMX and that has continued since. Last week were a number of GNU toolchain patches starting to land and that continued after the prior article.
The latest worth mentioning is that the LLVM support for the new Intel AMX instructions has also begun. As of yesterday, the initial patches for Intel AMX instruction support has been merged into LLVM 11 Git.
This includes the BFloat16, INT8, and TILE AMX instructions and requires the OS be supporting XSAVES. Just the initial support is in place and expect follow on LLVM 11 patches to come in the weeks ahead similar to the GNU toolchain patches progressing as well for AMX. At least with Sapphire Rapids Xeon CPUs not debuting until 2021, Intel remains on track with having the support wired up pre-launch.
Last week I outlined Intel beginning to send out Linux patches around AMX and that has continued since. Last week were a number of GNU toolchain patches starting to land and that continued after the prior article.
The latest worth mentioning is that the LLVM support for the new Intel AMX instructions has also begun. As of yesterday, the initial patches for Intel AMX instruction support has been merged into LLVM 11 Git.
This includes the BFloat16, INT8, and TILE AMX instructions and requires the OS be supporting XSAVES. Just the initial support is in place and expect follow on LLVM 11 patches to come in the weeks ahead similar to the GNU toolchain patches progressing as well for AMX. At least with Sapphire Rapids Xeon CPUs not debuting until 2021, Intel remains on track with having the support wired up pre-launch.
Add A Comment