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Intel's 5-Level Paging Support Being Prepped For Linux 4.12
Five level paging allows raising the Linux x86_64 limitation of 256 TiB of virtual address space to 128 PiB and raises the physical address space limit from 64 TiB to 4 PiB. While 64 TiB of memory may seem like a lot, some Intel customers are already hitting this limitation.
The new paging mode is exposed via the CONFIG_X86_5LEVEL Kconfig switch. Future Intel CPUs will support 5-level paging.
The latest set of 5-level paging patches have been posted to the kernel mailing list and looks like the developers are aligning them for merging into the Linux 4.12 merge window that will open at the end of April.