5-Level Paging Work Heads Into Linux 4.12
More of Intel's enablement work for supporting five-level paging is being sent into the Linux 4.12 kernel.
Five-level paging is supported by future Intel hardware and is about raising the physical and virtual address space for Intel Linux systems. Right now Linux x86_64 is limited to 256 TiB of virtual address space and 64 TiB of physical address space. With 5-level paging, the virtual address space goes up to a 128 PiB limit and the physical address space can be 4 PiB.
Yes, that's a heck of a lot of memory, but some Intel Linux customers have already been running against these limitations, thus necessitating the paging changes. With the x86/mm work for Linux 4.12 is more of the enablement work.
The x86/mm pull also has a number of fixes, Intel MPX fixes/enhancements, and other x86 memory alterations. More details on 5-level paging via this earlier article.
Five-level paging is supported by future Intel hardware and is about raising the physical and virtual address space for Intel Linux systems. Right now Linux x86_64 is limited to 256 TiB of virtual address space and 64 TiB of physical address space. With 5-level paging, the virtual address space goes up to a 128 PiB limit and the physical address space can be 4 PiB.
Yes, that's a heck of a lot of memory, but some Intel Linux customers have already been running against these limitations, thus necessitating the paging changes. With the x86/mm work for Linux 4.12 is more of the enablement work.
The x86/mm pull also has a number of fixes, Intel MPX fixes/enhancements, and other x86 memory alterations. More details on 5-level paging via this earlier article.
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