HiSilicon Proposes "Cache Lockdown" Driver For More Control Over L3 Cache
The proposed cache lockdown mode would allow greater control over an area within the L3 cache. Huawei's Yushan Wang describes this proposed driver for the mainline Linux kernel as:
"Cache has been playing the transparent yet crucial role of performance for modern computers. To fully exploit the potential of SoC cache, we made an attempt to lockdown the HiSilicon L3 cache.
Cache lockdown means to make a memory region locked inside the L3 cache for better access latency. The data stored in L3 cache will behave like any other data (i.e. it still follows cache coherency protocol etc.) except it won't be evicted unless explicitly asked to by deallocation.
Ideally locked data will have stable low access latency despite high background stress. It is also useful for scenarios that have especially high cache miss penalty. However, while enhancing some processes, reserving cache resource will raise the performance problem to other processes running on the CPUs that share the L3 cache that carries locked data, users should be careful to do so.
I would like to ask for opinions about the possibility to make this driver upstream, and the possible usecase of L3 cache lock within kernel. Further tests are needed to obtain the performance benefits and impact we get from L3 cache lock on such usecases."
With this driver, a /dev/hisi_l3c char device is created where operations can be performed on it like mmap() that then explicitly reside in the L3 cache.
Interesting work and we'll see where it leads and what performance benefits are ultimately found with this cache lockdown usage.
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