AMD Zen 2 CPU Support Merged To GCC 9 (-march=znver2)
It was just days ago that AMD published their Zen 2 compiler patch for the GCC compiler but with the race on to merge new feature code before the feature freeze happening later this month, that "znver2" tuning patch has now been merged to mainline.
The latest GCC 9.0.0 development code as of this Sunday morning now has the "-march=znver2" support for generating optimized binaries for the yet-to-be-released AMD Zen 2 processors. As covered in the article earlier this week, the Zen 2 GCC patch is an initial first stab at supporting the new AMD CPU micro-architecture in the GNU Compiler Collection.
Most of the patch is based on the existing "Zen 1" (znver1) target but it does support at least three of the new CPU instructions to be supported by these next-gen CPUs... Zen 2 brings support for cache line write back (CLWB), read processor ID (RDPID), and write back and do not invalidate cache (WBNOINVD). It's possible there are other new instructions coming that AMD isn't yet ready to reveal so they didn't include it as part of this initial patch.
The scheduler costs table and other tuning also still needs to be firmed up for Zen 2 while this initial code is good for starters and at least having this base znver2 support in time for GCC 9, which will ship as stable around the end of Q1'2019 with the initial stable version being GCC 9.1.0. The first AMD Zen 2 CPUs expected to launch in early 2019 are the new 7nm EPYC "Rome" processors.
Stay tuned to Phoronix for more Zen 2 coverage as the Linux/open-source enablement continues.
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