GCC To Begin Implementing MMX Intrinsics With SSE Instructions

While current-generation Intel/AMD CPUs are still supporting the MMX SIMD instruction set from two decades ago, a set of GCC compiler patches are pending to begin implementing MMX intrinsics using SSE instructions.

Intel open-source compiler toolchain expert H.J. Lu sent out a set of 46 patches for GCC that implement MMX intrinsics with SSE instructions instead. Of course, in modern code-bases hopefully you are utilizing modern versions of AVX.

The patches disable MMX by default in 64-bit mode and handle mapping MMX instructions to SSE versions, but with a few tricky instructions. The benefit when disabling MMX in 64-bit mode is that an 8-byte vectorizer is enabled with SSE2 but likely they are getting ready to permanently retire native MMX support in future processors.

Details on this pending patch series for GCC 10 can be found on their mailing list. Emulating all of the MMX instructions with SSE plus the test coverage adds over 6,500 lines of code to the GNU Compiler Collection.