"Ampere-1" GCC Patch Posted For Ampere's Upcoming AArch64 Core Design

Written by Michael Larabel in Arm on 2 November 2021 at 03:00 AM EDT. 11 Comments
While Ampere Altra and Altra Max processors are achieving great success using Arm Neoverse N1 based cores, as shared earlier this year Ampere has begun designing their own custom Arm server CPU cores for slated introduction in 2022. The first GCC compiler patch for that next-gen Ampere CPU was quietly posted on Monday.

An initial patch made it out providing support and basic tuning for Ampere's "Ampere-1" CPU. Ampere-1 isn't certainly the marketing name for their initial CPU core design but just what they are referring to at least initially for the GNU Compiler Collection target. Just as before IBM referred to their POWER10 GCC target as the 'future' target and then later on added in proper user-friendly string.
The Ampere-1 implements the ARMv8.6 architecture in A64 mode and is modelled as a 4-wide issue (as with all modern micro-architectures, the chosen issue rate is a compromise between the maximum dispatch rate and the maximum rate of uops issued to the scheduler).

This adds the -mcpu=ampere1 command-line option and the relevant cost information/tuning tables for the Ampere-1.
It at least makes clear the initial Ampere core design is based on ARMv8.6 but the patch doesn't reveal much more information in its basic form. The "ampere1" tuning will ultimately be important for generating optimized code targeting this processor.

Public details remain light on this next-gen core besides that it will be manufactured on a 5nm process and feature greater memory bandwidth as well as increased I/O and network bandwidth.

In any case, great to see the early enablement work happening around Ampere's own Arm core designs ahead of the planned launch in 2022. This aligns with Intel's pre-release additions to GCC (and LLVM Clang) for new CPUs / microarchitecture families and times much better than AMD not seeing compiler tuning until around product launch time with their status quo.
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