Chromebooks Powered By The MIPS Pistachio, Linux Support Evolving
Ionela Voinescu of Imagination Technologies, which is the current owner of MIPS, landed some improvements for this alternative CPU architecture into Coreboot over night.
Among the work was MIPS architecture support for libpayload and MIPS CPU SoC frequency support. Both commits mention a private Chrome OS partner bug and that they were tested on the Pistachio SoC.
The Imagionation Technologies Pistachio SoC is one of the company's new designs and in the past few months they've been enabling the support within the mainline Linux kernel. The Linux 4.0 kernel already brings support for some of the SoC components like MMC, SPI, I2C, DMA, watchdog timer, IR, PWM, etc, while more patches are outstanding for landing into Linux 4.1 or later. While Imagination Tech may not yield good memories for many longtime open-source/Linux users, it seems with the Pistachio SoC they're working to get the support into good standing within mainline quite on time.
The IMG Pistachio SoC is based on a dual-core MIPS interAptiv processor. Beyond the Coreboot references, there's also some MIPS Pistachio references within Chromium bug reports. Some of the Linux kernel patches enabling Pistachio support were also authored and copyrighted by Google. This month at Mobile World Congress there were some devices on display using Altair LTE devices with MIPS CPUs.
It will be interesting to see what comes about of the MIPS/IMG Pistachio SoC under Linux. For those looking for a low-cost MIPS Linux experience right now, there is the new MIPS development board for hobbyists and developers.