CXL 2.0 Driver For Host-Managed Device Memory Should Be Ready For Linux 5.18
Queued this week into the CXL subsystem's "pending" Git branch is the cxl_mem driver. Longtime Intel open-source Linux driver engineer Ben Widawsky who has been working on the CXL support explained of the status, "At this point the subsystem can enumerate all CXL ports (CXL.mem decode resources in upstream switch ports and host bridges) in a system. The last mile is connecting those ports to endpoints. The cxl_mem driver connects an endpoint device to the platform CXL.mem protocol decode-topology."
The CXL Memory Expansion Kconfig build switch being introduced adds:
The CXL.mem protocol allows a device to act as a provider of "System RAM" and/or "Persistent Memory" that is fully coherent as if the memory were attached to the typical CPU memory controller. This is known as HDM "Host-managed Device Memory".
Say 'y/m' to enable a driver that will attach to CXL.mem devices for memory expansion and control of HDM. See Chapter 9.13 in the CXL 2.0 specification for a detailed description of HDM.
The "pending" branch also has many other CXL parches queuing up including device serial number reporting, Interface Ready Timeout handling, and various other additions and fixes. Barring any surprises that code should then wind up in the Linux 5.18 cycle and building off other recent Intel-contributed additions like CXL memory hotplug and other CXL code that has been landing in earnest over the past year.