AMD Announces Pensando Salina 400 DPU & Pollara 400 Ultra Ethernet NIC

Written by Michael Larabel in AMD on 10 October 2024 at 02:00 PM EDT. 6 Comments
AMD
In addition to announcing the EPYC 9005 "Turin" processors and the latest on the AMD Instinct front, Lisa Su at the AMD Advancing AI event in San Francisco also announced the AMD Pensando Salina 400 DPU and AMD Pensando Pollara 400 Ultra Ethernet AI NIC.

The AMD Pensando Salina 400 data processing unit (DPU) is designed for hyperscalers and offers 400G networking with dual 400GE PCIe Gen 5 connections, 232 P4 MPU engines, up to 128GB DDR5 memory, and 16 x Arm Neoverse-N1 CPU cores. The AMD Pensando Salina 400 DPU is designed to handle software defined networking, firewalls, encryption, load balancing, network address translation, and storage offloading.

AMD Pensando Salina 400


Also on the networking side, the AMD Pensando Pollara 400 was announced as the first Ultra Ethernet Consortium (UEC) ready AI NIC. The AMD Pensando Pollara 400 offers a programmable hardware pipeline, 400 Gbps bandwidth, and open-source drivers. It was just last year that the Ultra Ethernet Consortium was started by the likes of AMD, Intel, the Linux Foundation, Meta, HPE, and other organizations.

AMD Pensando Pollara 400


That's the brief overview on the AMD Pensando Salina 400 and AMD Pensando Pollara 400 products with not receiving much information on them in advance and spending most of my time/focus on the new 5th Gen AMD EPYC processors, a.k.a. the AMD EPYC 9965 / 9755 / 9565F CPU benchmarks.
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