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More AMD RDNA3 Code Prepared For Linux 5.19, RADV Begins Landing Task Shaders
As the likely last feature pull for AMDGPU/AMDKFD to DRM-Next of material planned for Linux 5.19, AMD submitted more graphics IP block enablement code of what is almost certainly all for RDNA3 GPUs. Today's pull has the VCN 4.0 video encode/decode enablement as well as NBIO 4.3, IH 6.0, HDP 6.0, HDP 5.2, NBIO 7.7, GMC 11.0, GCC 11.0, and SDMA 6.0 blocks enabled. This is all part of their new block-by-block enablement strategy with their driver moving to an IP-based enumeration approach.
In addition to the AMDGPU kernel driver seeing a lot of new blocks enabled, other recently introduced blocks from prior pulls have seen updates. There are updates to the support for SMUI 13.x, PSP 13.x, SMU 13.x, and more. Plus this latest pull request adds VCN RAS support, other RAS reliability fixes, code clean-ups, and various other fixes throughout.
See this pull for the latest details on these AMDGPU/AMDKFD driver changes being added to the Direct Rendering Manager material for Linux 5.19.
Separately, in user-space and outside of AMD, Valve developer Timur Kristóf has merged the RADV task shader support with the compiler-related changes. The task and mesh shader draw calls support still needs to be implemented and exposing the NV_mesh_shader extension. In any case, a win here with that latest support code merged. As summed up by Timur, "Task shader is an optional stage that can run before a Mesh shader in a graphics pipeline. It's a compute-like stage whose primary output is the number of launched mesh shader workgroups (1 task shader workgroup can launch up to 2^22 mesh shader workgroups), and also has an optional payload output which is up to 16K bytes."