AMD Sends Out Updated Linux Patches For PerfMonV2 That's Expected With Zen 4
AMD's open-source Linux engineers on the CPU side of the house continue being quite busy with all sorts of new feature enablement work, which given their timing and other factors is almost all definitively for upcoming Zen 4. AMD this week sent out updated patches in getting "PerfMonV2" support in order that is updated performance monitoring abilities with upcoming processors.
Back in March I wrote about PerfMonV2 back when AMD originally published the Linux support patches. This Performance Monitoring Version Two is for new/updated hardware performance counter abilities with a "new generation" of AMD CPUs and ensuring this new behavior is supported under Linux. Hardware performance counters under Linux via the perf subsystem is becoming increasingly used by a variety of parties for cases from debugging to using the performance counters for feedback/profile-driven compiler optimizations in the name of being able to achieve greater performance.
New with AMD Performance Monitoring V2 is the addition of "global" registers that allow enabling/disabling multiple performance counters at the same time. With the AMD Performance Monitoring up to this point, the different performance counter controls all had to be set individually while now can be set easily in one-go using the global registers (i.e. a single MSR write).
AMD PerfMonV2 also adds new core PMU features for the dynamic detection of the number of available PMCs rather than expecting a static set number in the code.
These latest AMD PerfMonV2 patches can be found on the kernel mailing list. If all goes well these patches could be mainlined in the v5.19 kernel and thus still supported by mainline ahead of Zen 4 processors launching later in the calendar year.
Back in March I wrote about PerfMonV2 back when AMD originally published the Linux support patches. This Performance Monitoring Version Two is for new/updated hardware performance counter abilities with a "new generation" of AMD CPUs and ensuring this new behavior is supported under Linux. Hardware performance counters under Linux via the perf subsystem is becoming increasingly used by a variety of parties for cases from debugging to using the performance counters for feedback/profile-driven compiler optimizations in the name of being able to achieve greater performance.
New with AMD Performance Monitoring V2 is the addition of "global" registers that allow enabling/disabling multiple performance counters at the same time. With the AMD Performance Monitoring up to this point, the different performance counter controls all had to be set individually while now can be set easily in one-go using the global registers (i.e. a single MSR write).
AMD PerfMonV2 also adds new core PMU features for the dynamic detection of the number of available PMCs rather than expecting a static set number in the code.
These latest AMD PerfMonV2 patches can be found on the kernel mailing list. If all goes well these patches could be mainlined in the v5.19 kernel and thus still supported by mainline ahead of Zen 4 processors launching later in the calendar year.
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