Patches Revised For AMD PerfMonV2 PMU Guest Support

Back in March AMD began sending out patches for PerfMonV2 support with Zen 4 CPUs. This updated AMD Performance Monitoring "V2" code has premiered now with AMD Ryzen 7000 series and AMD EPYC 9004 series processors and the host-side PerfMonV2 code was merged in Linux 5.19. But support for PerfMonV2 within KVM guests has been lacking while now an updated patch series is working to address the functionality there.

Performance Monitoring Version Two is for new/updated hardware performance counter abilities with Ryzen 7000 series and EPYC 9004 series "Zen 4" processors. Hardware performance counters under Linux via the perf subsystem is becoming increasingly used by a variety of parties for cases from debugging to using the performance counters for feedback/profile-driven compiler optimizations in the name of being able to achieve greater performance. New to AMD Performance Monitoring V2 is the addition of "global" registers that allow enabling/disabling multiple performance counters at the same time. With the AMD Performance Monitoring up to this point, the different performance counter controls all had to be set individually while now can be set easily in one-go using the global registers (i.e. a single MSR write).

AMD EPYC "Genoa" processors running in AMD's Titanite reference platform.

While the PerfMonV2 host support has been present since Linux 5.19, being able to tap PerfMonV2 PMU functionality within KVM guests hasn't been wired up but it being done with pending patches.

Starting with Zen4, core PMU on AMD platforms such as Genoa and Ryzen-7000 will support PerfMonV2, and it is also compatible with legacy PERFCTR_CORE behavior and msr addresses.

If you don't have access to the hardware specification, the commits d6d0c7f681fd..7685665c390d for host perf can also bring a quick overview. Its main change is the addition of three msr's equivalent to Intel V2, namely global_ctrl, global_status, global_status_clear.

It is worth noting that this feature is very attractive for reducing the overhead of PMU virtualization, since multiple [MSR] accesses to multiple counters will be replaced by a single access to the global register, plus more accuracy gain when multiple guest counters are used.

All related testcases are passed on a Genoa box.

Sent out at the end of last week are these patches for enabling PerfMonV2 PMU support for KVM guests running on Zen 4 hardware. Hopefully this work will manage to be deemed ready in time for the upcoming v6.2 kernel cycle.