AMD IOMMU With Linux 6.4 Supports 5-Level Guest Page Tables

Back in 2021 AMD began preparing Linux kernel support for 5-level paging support with their future processors and building off the prior 5-level page table kernel support established by Intel. That was followed by AMD enabling 5-level page table support with KVM SVM in the Linux 5.15 kernel. AMD CPUs with 5-level page table support since launched in the form of 4th Gen EPYC "Genoa" processors. One piece only now coming together though is AMD IOMMU driver support for 5-level guest page table support.

5-level page table support is important for vastly expanding the amount of virtual and physical address space relative to 4-level page tables. With 5 level paging there is support for addressing up to 4 PiB of physical memory addresses. The only downside to this extra page table level is longer page table walks.

With the in-development Linux 6.4 kernel, the AMD IOMMU driver (amd_iommu) is set to see 5-level guest page table support. If both the processor and IOMMU support 5-level page tables, the Linux 6.4 kernel will enable it otherwise fallback to the existing 4-level page tables.

Separately, the AMD IOMMU driver for Linux 6.4 also now adds NUMA-awareness to memory allocations. More details on these AMD IOMMU driver changes and other IOMMU subsystem work for the new kernel can be found via this Sunday's pull.