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Speaking for myself, nah. Honestly, nouveau has been an amazing way of developing reverse engineering and developing skills that you just don't learn...
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I doubt this explanation is true. They went out of their way to design a "signature check" specifically for the firmware running on the Falcon...Last edited by RSpliet; 06 January 2020, 05:31 PM.
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Granted, but with a caveat. As fused op design progresses from quick wins to more niche corner cases, the returns of adding (CISC or fused) instruction...
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I would like to challenge that thought a bit. So far we haven't seen high performance RISC, but I think that's mainly because it's easier to get performance...Last edited by RSpliet; 09 July 2018, 09:02 AM.
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Thank you for this wonderful demonstration of a classic slippery slope fallacy! If I may: ARM cores use binary blobs for the TrustZone mechanism. Other...Last edited by RSpliet; 26 June 2018, 10:15 AM.
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The connection between DRAM and DRAM controller requires a surprisingly large amount of tricks to maintain perfect signal integrity at high speed. Think...Last edited by RSpliet; 24 June 2018, 10:27 PM.
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Turns out making the analogue side of a DRAM controller is much like performing witchcraft. SiFive hasn't had the time or manpower to do that proper....Last edited by RSpliet; 24 June 2018, 06:39 PM.
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