Well, we have a rather funny misunderstanding here. This is not about disabling the cache, but rather fine tune which data enters the cache.
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Don't expect much performance improvement from it. Application try to avoid allocating new memory quite hard because of the overhead.
We...
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Deathsimple replied to New TTM Code Can Yield 3~5x Faster Page Allocation For AMDGPU, Other Benefitsin X.Org & DRMI don't expect much improvement for real world applications. They just try to avoid freeing and reallocating memory quite hard because of the overhea...
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Guys get the soda and popcorn, whatever Linus answer is it is going to be entertaining
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The driver tells the state tracker what mode it supports (field vs. frame) and which should be used by default. The VDPAU state tracker can deal with...
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As far as I know the RV515 is the only R5xx card with UVD....
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Sounds like the fallback works better than I thought. But take a screen shot and compare it (binary) with a VDPAU output. You will find that you only...
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Ah! Thanks for the notification, that's just a bug. Going to provide a mesa patch.
The field based output is needed to...
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Well that's the point where the only best effort starts
The first problem is that in theory the released code should work on the very...
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Maybe I should explain a bit more UVD isn't a singular block. You've got a VCPU, memory controller, register bus, motion compensator etc...
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Actually Jay Cornwall implemented this stuff and Alex pushed it through review.
I was just the one to cleanup and release the patches.
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Correct, there is no support for it before NI and even NI-CIK only support it for VRAM not GART....
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