GNU Binutils 2.28 Released, Adds RISC-V Support

[phoronix]

Phoronix: GNU Binutils 2.28 Released, Adds RISC-V Support

Binutils 2.28 is out today as the latest version of this important GNU package...

http://www.phoronix.com/scan.php?page=news_item&px=GNU-Binutils-2.28

[doublez13]

Is there an actual RISC-V implementation out now that has computing power anywhere near the average Intel x64, or is RISC-V more used as an ARM/MIPS replacement?

[blubbaer]

Is there an actual RISC-V implementation out now that has computing power anywhere near the average Intel x64, or is RISC-V more used as an ARM/MIPS replacement?

Besides FPGA implementations the only available hardware that uses RISC-V is the HiFive1. Also RISC-V is a very young ISA and the specification for the priviledged architecture isn't final. There is no point in making hardware (besides for MCU) when the specification isn't done. You have to wait at least two or three years before real hardware with the computational power of a Raspberry Pi 3 is shipped. One core that is still in development, is BOOM which in its 2w-configuration is slightly better than a Cortex-A9 and in the 4w-configuration is at the same level as a Cortex-A15 (source). This comparison is a bit unfair, as the A9 and A15 are 32-bit CPUs and BOOM is 64 bit.