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Linux 5.9 Enables P2PDMA For All AMD CPUs Zen + Newer

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  • Linux 5.9 Enables P2PDMA For All AMD CPUs Zen + Newer

    Phoronix: Linux 5.9 Enables P2PDMA For All AMD CPUs Zen + Newer

    The PCI subsystem updates have been sent in for the Linux 5.9 kernel. Peer-to-peer DMA support is now solid for all AMD CPUs of the Zen family or newer...

    Phoronix, Linux Hardware Reviews, Linux hardware benchmarks, Linux server benchmarks, Linux benchmarking, Desktop Linux, Linux performance, Open Source graphics, Linux How To, Ubuntu benchmarks, Ubuntu hardware, Phoronix Test Suite

  • #2
    Originally posted by chuckula

    i got three words for you: Tuh-rigg-urrd!!!

    Repression alert!
    Repression alert!
    Can you please stop spamming your nonsense in every thread? It wasn’t amusing the first time, and now its become really tiresome.

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    • #3
      Yeah, you could at the least do it in a clever way, like:

      Typo: whitelist -> allowlist 😅

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      • #4
        What is this useful for? What devices use it?

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        • #5
          Sounds like a nice feature with plenty of uses, but when attacks like Broadpwn* that can get around whitelisting by leveraging previously whitelisted devices I'm not sure it's a very good idea from a security perspective. Sort of like all the corners particularly Intel cut in it's branch prediction implementations causing the Spectre/Meltdown vulnerabilities.

          *This attack takes over the network chip, which runs it's own minimalist but very much exploitable OS, and then leverages it's ability to do DMA for basically total access to basically everything on the system.

          Originally posted by timofonic View Post
          What is this useful for? What devices use it?
          Various network and particularly compute use cases have a lot of use for it as it allows the devices to communicate directly with each other rather than having to rely on the CPU passing on messages/data at set times. Particularly multi-device high performance compute tasks can benefit greatly from this and having worked on GPU-based HPC jobs I can immediately think of a project where this would have been very useful.
          Last edited by L_A_G; 10 August 2020, 10:06 AM.

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          • #6
            Originally posted by timofonic View Post
            What is this useful for? What devices use it?
            Two pcie devices that want to transfer data directly to one another without going through system memory. E.g., between a video camera and a GPU for video encoding/decoding or a GPU and an RDMA NIC for large machine learning clusters.

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            • #7
              Originally posted by L_A_G View Post
              Sounds like a nice feature with plenty of uses, but when attacks like Broadpwn* that can get around whitelisting by leveraging previously whitelisted devices I'm not sure it's a very good idea from a security perspective. Sort of like all the corners particularly Intel cut in it's branch prediction implementations causing the Spectre/Meltdown vulnerabilities.

              *This attack takes over the network chip, which runs it's own minimalist but very much exploitable OS, and then leverages it's ability to do DMA for basically total access to basically everything on the system.
              IOMMU exists on serious platforms (also ARM has its own thing). With that enabled it should have no access to the full RAM, and see only its allocated RAM space, or the RAM space of another device it is sharing stuff with.

              Then again, IOMMU can and did have bugs and issues in the past on some hardware.

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              • #8
                How to know if a Cpu supports this capability?

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