Phoronix: Clang 20 Compiler Adds Support For Xtensa CPU Target
Back in early 2023 an Xtensa back-end was added to LLVM for the Cadence Tensilica Xtensa IP. Xtensa is used for DSPs, micro-controllers, and this 32-bit RISC architecture is also used for other hardware like data processing engines. Two years after the LLVM back-end was introduced, the Clang C/C++ compiler has added Xtensa target support...
Back in early 2023 an Xtensa back-end was added to LLVM for the Cadence Tensilica Xtensa IP. Xtensa is used for DSPs, micro-controllers, and this 32-bit RISC architecture is also used for other hardware like data processing engines. Two years after the LLVM back-end was introduced, the Clang C/C++ compiler has added Xtensa target support...
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