LLVM Now Has "Official" Support For Targeting NEC's Vector Engine (VE)

[phoronix]

Phoronix: LLVM Now Has "Official" Support For Targeting NEC's Vector Engine (VE)

The LLVM compiler infrastructure supports not only a growing number of CPU architectures but continues to lead when it comes to its support for different accelerators. Back in 2019 NEC was working to upstream their SX-Aurora VE "Vector Engine" Accelerator and now as of this week that target is considered officially supported upstream...

https://www.phoronix.com/scan.php?page=news_item&px=LLVM-NEC-VE-Official

[schmidtbag]

I had no idea NEC made such things.

[coder]

I had no idea NEC made such things.

Japanese have a long history of fairly niche processors, focused on HPC and mainframes. Some of the more notable I've come across are:

• https://en.wikichip.org/wiki/pezy/pezy-scx/pezy-sc3
• https://www.nextplatform.com/2021/06...ai-powerhouse/

What really caught my attention about PEZY is their use a near-field RF link (TCI) for communicating with in-package DRAM. The specs put even HBM3 to shame!

"This chip incorporates 8 interfaces, operating at 3 GHz for a bandwidth of 1.525 TB/s per interface for a total aggregated bandwidth of 12.2 TB/s"

Sources:

• https://en.wikichip.org/wiki/pezy/pezy-scx/pezy-sc3
• https://en.wikichip.org/wiki/thruchip_interface

Anyway, this appears to be their product page for the NEC accelerators mentioned in the article. Looking through Top500, they & their predecessors seem reasonably popular:

https://www.nec.com/en/global/soluti...or_engine.html

BTW, here's another Japanese processor company, Phoronix has sometimes covered, that I haven't seen mentioned, recently:

http://www.socionext.com/en/

I guess they focus mainly on custom/embedded stuff.

[jabl]

I had no idea NEC made such things.

NEC used to be a big vendor of vector supercomputers. If you remember the "Earth Simulator" that shocked the supercomputing world, that was a NEC machine. ES, back in the day, was really an unprecedented step up in supercomputer performance. On the HPL benchmark, used for ranking the top500 list, it was something like 5 times faster than the next fastest system, but not only that, being a vector architecture with a memory subsystem to match it could sustain a fairly high fraction of the peak performance in many important real applications (think something like 50% of peak performance vs. about 5% for a microcomputer (x86/RISC) based system for somewhat common sparse matrix type computations).

With the latest generation, they switched from being "full" processors to being these add-in accelerator cards.