SiFive Begins Adding RISC-V "Bullet" Microarchitecture Code To LLVM

[phoronix]

Phoronix: SiFive Begins Adding RISC-V "Bullet" Microarchitecture Code To LLVM

On Friday night patches began to appear for "RISC-V Bullet" in the LLVM compiler code-base...

http://www.phoronix.com/scan.php?pag...et-LLVM-Starts