Announcement

Collapse
No announcement yet.

LLVM Plumbs Support For Intel Golden Cove's New SERIALIZE Instruction

Collapse
X
 
  • Filter
  • Time
  • Show
Clear All
new posts

  • LLVM Plumbs Support For Intel Golden Cove's New SERIALIZE Instruction

    Phoronix: LLVM Plumbs Support For Intel Golden Cove's New SERIALIZE Instruction

    Yesterday we noted Intel's programming reference manual being updated with new Golden Cove instructions for Sapphire Rapids and Alder Lake and with that Intel's open-source developers have begun pushing their changes to the compilers. The latest updates add TSXLDTRK, a new HYBRID bit for Core+Atom hybrd CPUs, and a new SERIALIZE instruction. After GCC was receiving the patch attention yesterday, LLVM is getting its attention today...

    http://www.phoronix.com/scan.php?pag...E-LLVM-Support

  • #2
    Typo:

    Originally posted by phoronix View Post
    Phoronix: LLVM Plumbs Support For Intel Golden Cove's New SERIALIZE Instruction

    Yesterday we noted Intel's programming reference manual being updated with new Golden Cove instructions for Sapphire Rapids and Alder Lake and with that Intel's open-source developers have begun pushing their changes to the compilers. The latest updates add TSXLDTRK, a new HYBRID bit for Core+Atom hybrd CPUs, and a new SERIALIZE instruction. After GCC was receiving the patch attention yesterday, LLVM is getting its attention today...

    http://www.phoronix.com/scan.php?pag...E-LLVM-Support

    Comment

    Working...
    X