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Intel Tightens Up Its AVX-512 Behavior For The LLVM Clang 10 Compiler

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  • Intel Tightens Up Its AVX-512 Behavior For The LLVM Clang 10 Compiler

    Phoronix: Intel Tightens Up Its AVX-512 Behavior For The LLVM Clang 10 Compiler

    Intel engineer Craig Topper who frequently contributes the new Intel CPU support to LLVM/Clang has made an AVX-512 behavioral change for next spring's LLVM Clang 10 release...

    http://www.phoronix.com/scan.php?pag...-AVX512-Change

  • #2
    Basically an effort to remove the AVX-512 frequency step down problem by denying ZMM and allow only 256 bit intrinsics.

    Someone must have gotten the word back to Intel the value was lost.

    It will be interesting to see what the next gen Zen does with this in the future based on what Intel learned.

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    • #3
      AVX-512 might be better possible at 7nm for Intel or 5nm for TSMC/AMD. But really, more cores with AVX2 will do just fine instead of AVX512 IMO.

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