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The Gaming Performance Impact From The Intel JCC Erratum Microcode Update

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  • starshipeleven
    replied
    Originally posted by atomsymbol View Post

    In my opinion, Intel made a very serious, completely avoidable, mistake in the design of their Skylake-based CPUs. One of their solutions is to patch compiler toolchains. Enabling the patch will affect about 99% of x86 applications because a jump instruction image crossing a 32-byte boundary or ending on a 32-byte boundary has probability close to 100% to appear in an x86 application at least once. Developers who are conscious about the quality of their software will be forced to pass special flags to the toolchain which will slightly slow down or increase the codesize of future applications on all non-Intel CPUs and on all Intel CPUs without the erratum. Because this is an avoidable erratum which should have been detected during CPU design validation, patching the toolchain is quite unusual.

    The other solution, to let Intel CPU users to update microcode in their machines, is fine because it does not slow down non-Intel CPUs nor Intel CPUs without the erratum.
    I don't think bullshit like "let's recompile all software to fix hardware issues" should go down. This is a hardware problem, so either load updated microcode and suck it, or change the CPU/system.

    Leave a comment:


  • Linuxxx
    replied
    Michael

    Thanks for pointing out the higher frame-times!

    As if the situation wasn't already bad enough with these...

    Still, all the more reason to run a "lowlatency" kernel to, wait for it, 'mitigate' the higher frame-times! (See what I did there?)

    Leave a comment:


  • atomsymbol
    replied
    Originally posted by phoronix View Post
    Phoronix: The Gaming Performance Impact From The Intel JCC Erratum Microcode Update

    While Intel engineers are working on toolchain updates for working around the issue -- and generally working well as shown in the tests earlier ...

    http://www.phoronix.com/vr.php?view=28466
    In my opinion, Intel made a very serious, completely avoidable, mistake in the design of their Skylake-based CPUs. One of their solutions is to patch compiler toolchains. Enabling the patch will affect about 99% of x86 applications because a jump instruction image crossing a 32-byte boundary or ending on a 32-byte boundary has probability close to 100% to appear in an x86 application at least once. Developers who are conscious about the quality of their software will be forced to pass special flags to the toolchain which will slightly slow down or increase the codesize of future applications on all non-Intel CPUs and on all Intel CPUs without the erratum. Because this is an avoidable erratum which should have been detected during CPU design validation, patching the toolchain is quite unusual.

    The other solution, to let Intel CPU users to update microcode in their machines, is fine because it does not slow down non-Intel CPUs nor Intel CPUs without the erratum.

    Leave a comment:


  • The Gaming Performance Impact From The Intel JCC Erratum Microcode Update

    Phoronix: The Gaming Performance Impact From The Intel JCC Erratum Microcode Update

    This morning I provided a lengthy look at the performance impact of Intel's JCC Erratum around the CPU microcode update issued for Skylake through Cascade Lake for mitigating potentially unpredictable behavior when jump instructions cross cache lines. Of the many benchmarks shared this morning in that overview, there wasn't time for any gaming tests prior to publishing. Now with more time passed, here is an initial look at how the Linux gaming performance is impacted by the newly-released Intel CPU microcode for this Jump Conditional Code issue.

    http://www.phoronix.com/vr.php?view=28466
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