Cluster-Aware Scheduling Lands In Linux 5.16

[phoronix]

Phoronix: Cluster-Aware Scheduling Lands In Linux 5.16

The "sched/core" scheduler updates landed on Monday into the Linux 5.16 kernel. Notable this pull request is the cluster-aware scheduling support...

https://www.phoronix.com/scan.php?pa....16-Sched-Core

[Alex/AT]

For those wondering about AMD benefits, at least when trying out the code when initially queued into sched/core, it wasn't yet able to map any cluster/CCX layouts on Zen 3 chips

So it's again some obscure crap that will slow stuff for everyone and will have effect only on few obscure chips.
Duly noted

[aufkrawall]

Elephant in the room: What about something like the Thread Director for Alder Lake on Windows 11?

[Alex/AT]

Elephant in the room: What about something like the Thread Director for Alder Lake on Windows 11?

The one that's killing AMD chips L3 cache handling on the way? Thanks but no thanks Indeed obscure crap good for nothing but obscure chips as well.
Luckily, my PC will never be Win11 compatible due to TPM being disabled for good (not a fan of some obscure chip storing critical stuff like encryption keys instead of password-protecting/encrypting them).

[aufkrawall]

The one that's killing AMD chips L3 cache handling on the way?

That was fixed, gaming performance should be fine now. But of course Intel compared with unfixed state in their slides..

[yump]

I don't know what exactly "Jacobsville" is, but it seems like Alder Lake's E-cores come in clusters of 4 sharing an L2, so maybe it's that?

[intelfx]

Elephant in the room: What about something like the Thread Director for Alder Lake on Windows 11?

Nothing. Nobody cares, just as nobody cares about preferential scheduling for AMD Zen.

[F.Ultra]

I don't know what exactly "Jacobsville" is, but it seems like Alder Lake's E-cores come in clusters of 4 sharing an L2, so maybe it's that?

It's an Atom based SoC, the CPU itself used is Tremont: https://en.wikichip.org/wiki/intel/m...ctures/tremont similar to Alder Lake in that the L2-cache is shared per 4-core cluster

[F.Ultra]

So it's again some obscure crap that will slow stuff for everyone and will have effect only on few obscure chips.
Duly noted

This is early work and more chips will most likely follow, Zen1-3 (and looks that way for Zen4 as well) only share L3 so probably some one have to first show that scheduler awareness of L3 sharing is beneficial. The impact on systems without any clustering info should be zero so it will slow stuff for no one.

[smitty3268]

That was fixed, gaming performance should be fine now. But of course Intel compared with unfixed state in their slides..

It sounded like another issue was found, where if you swap out the CPU in the system it goes back to the slow state again. Which is pretty bad for reviewers trying to benchmark different CPUs.